1. Field
This disclosure relates generally to integrated circuits, and more specifically, to an integrated circuit memory having a variable memory array power supply voltage.
2. Related Art
Lower power consumption has been gaining importance in integrated circuits due to, for example, wide spread use of portable and handheld applications. Most circuits in handheld devices are typically off or inactive, for example, in an idle or deep sleep mode, for a significant portion of time, consuming only leakage power. As transistor leakage currents increase with finer geometry manufacturing processes, it becomes more difficult to meet chip leakage targets using traditional power reduction techniques. Also, finer geometries make it possible for larger cache memories to be integrated on an integrated circuit. However, the increased size of cache memories results in an increased number of leakage paths. Because the cache memory is inactive most of the time, it is desirable to decrease the memory cell leakage.
There are several methods for reducing leakage currents of integrated circuits during a low power mode. One method involves providing a “virtual” ground terminal that can be at ground potential during a normal operating mode and then increased above ground during a low power operating mode to reduce the leakage current. However, as power supply voltages decrease, it becomes more important to maintain the increased voltage on the virtual ground terminal during the low power operating mode very accurately so that stored data is not inadvertently corrupted.
Therefore, what is needed is an integrated circuit that has less leakage current without affecting reliability.